It is known to include contact holes in semiconductor devices for electrically connecting upper and lower conductors. In detail, the contact hole can be formed through an insulating layer interposed between the upper and lower conductors to define a penetration path connecting the upper and lower conductors, and a conductive material can be formed in the contact hole to electrically connect the upper and lower conductors.
With high integration of semiconductor devices, the diameter of contact holes and the alignment margin between contact holes and lower conductors may be reduced. Further, there is a need for a contact hole having a smaller diameter than that formed by a photolithography process. To follow these trends in semiconductor devices, a self-aligned contact (SAC) hole has been introduced.
In some conventional approaches in forming a SAC hole, a conductive layer and a hard mask layer are sequentially formed on a substrate, and these layers are patterned to form a stacked structure having a conductor and a hard mask pattern. An insulating spacer layer is formed on sidewalls of the conductor and the hard mask pattern, and an interlayer insulating layer is formed on the entire surface of the substrate. Here, the interlayer insulating layer has a larger etching rate than the hard mask pattern and the insulating spacer layer. Then, a SAC hole is formed through the interlayer insulating layer in such a manner that the SAC hole has a sidewall aligned with the hard mask pattern and the insulating spacer layer.
The above conventional method of forming the SAC hole can provide advantages in manufacturing high-density integrated semiconductor device since the SAC hole can be self-aligned in a direction perpendicular to a sidewall of the hard mask pattern. Even when regions where contact holes will be formed are misaligned during photolithography, the SAC holes can be precisely formed between hard mask patterns in a direction perpendicular to the sidewall of the hard mask patterns. However, since the SAC holes may not be self-aligned in a direction that is parallel to the sidewall of the hard mask pattern, the SAC holes can be formed at misaligned positions in the direction parallel to the sidewall of the hard mask pattern. Therefore, contacts may not be densely arranged in the direction of the sidewall of the hard mask pattern, thereby possibly producing negative effects on device integration.